63 research outputs found

    Object oriented execution model (OOM)

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    This paper considers implementing the Object Oriented Programming Model directly in the hardware to serve as a base to exploit object-level parallelism, speculation and heterogeneous computing. Towards this goal, we present a new execution model called Object Oriented execution Model - OOM - that implements the OO Programming Models. All OOM hardware structures are objects and the OOM Instruction Set directly utilizes objects while hiding other complex hardware structures. OOM maintains all high-level programming language information until execution time. This enables efficient extraction of available parallelism in OO serial code at execution time with minimal compiler support. Our results show that OOM utilizes the available parallelism better than the OoO (Out-of-Order) modelPeer ReviewedPostprint (published version

    A general guide to applying machine learning to computer architecture

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    The resurgence of machine learning since the late 1990s has been enabled by significant advances in computing performance and the growth of big data. The ability of these algorithms to detect complex patterns in data which are extremely difficult to achieve manually, helps to produce effective predictive models. Whilst computer architects have been accelerating the performance of machine learning algorithms with GPUs and custom hardware, there have been few implementations leveraging these algorithms to improve the computer system performance. The work that has been conducted, however, has produced considerably promising results. The purpose of this paper is to serve as a foundational base and guide to future computer architecture research seeking to make use of machine learning models for improving system efficiency. We describe a method that highlights when, why, and how to utilize machine learning models for improving system performance and provide a relevant example showcasing the effectiveness of applying machine learning in computer architecture. We describe a process of data generation every execution quantum and parameter engineering. This is followed by a survey of a set of popular machine learning models. We discuss their strengths and weaknesses and provide an evaluation of implementations for the purpose of creating a workload performance predictor for different core types in an x86 processor. The predictions can then be exploited by a scheduler for heterogeneous processors to improve the system throughput. The algorithms of focus are stochastic gradient descent based linear regression, decision trees, random forests, artificial neural networks, and k-nearest neighbors.This work has been supported by the European Research Council (ERC) Advanced Grant RoMoL (Grant Agreemnt 321253) and by the Spanish Ministry of Science and Innovation (contract TIN 2015-65316P).Peer ReviewedPostprint (published version

    Supporting communication among cognitive robots in simulated environments

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    Despite the fact that the Khepera II is an experimental platform widely used in the scientific community related to robotics research, its application to cognitive robotics is not as extensive as it should be. Particularly, in this field of research, the Khe-DeLP framework has arisen as an interesting proposal for developing cognitive agents to control real and simulated Khepera II robots. Although Khe-DeLP allows to work with multiple robots within the same environment, at present, only nonintentional communication among them can be achieved in this framework. Therefore, in this work we present extentions to Khe-DeLP to be able to model simulated scenarios where multiple robots interact by using explicit communication among them. This new feature improves Khe-DeLP since any kind of coordination problems can be simulated within the framework. As concept test, an example is presented which aims to validate coordinated behaviours of the robots by using the new communication features included in Khe-DeLP.Presentado en el XII Workshop Agentes y Sistemas Inteligentes (WASI)Red de Universidades con Carreras en Informática (RedUNCI

    Alterations in oxidative, inflammatory and apoptotic events in short-lived and long-lived mice testes

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    Aged testes undergo profound histological and morphological alterations leading to a reduced functionality. Here, we investigated whether variations in longevity affect the development of local inflammatory processes, the oxidative state and the occurrence of apoptotic events in the testis. To this aim, well-established mouse models with delayed (growth hormone releasing hormone-knockout and Ames dwarf mice) or accelerated (growth hormone-transgenic mice) aging were used. We hereby show that the testes of short-lived mice show a significant increase in cyclooxygenase 2 expression, PGD2 production, lipid peroxidation, antioxidant enzymes expression, local macrophages and TUNEL-positive germ cells numbers, and the levels of both pro-caspase-3 and cleaved caspase-3. In contrast, although the expression of antioxidant enzymes remained unchanged in testes of long-lived mice, the remainder of the parameters assessed showed a significant reduction. This study provides novel evidence that longevity confers anti-inflammatory, anti-oxidant and anti-apoptotic capacities to the adult testis. Oppositely, short-lived mice suffer testicular inflammatory, oxidative and apoptotic processes.Fil: Matzkin, Maria Eugenia. Consejo Nacional de Investigaciones Científicas y Técnicas. Instituto de Biología y Medicina Experimental. Fundación de Instituto de Biología y Medicina Experimental. Instituto de Biología y Medicina Experimental; Argentina. Universidad de Buenos Aires. Facultad de Medicina. Departamento de Bioquímica Humana; ArgentinaFil: Miquet, Johanna Gabriela. Universidad de Buenos Aires. Facultad de Farmacia y Bioquímica; ArgentinaFil: Fang, Yimin. Southern Illinois University. School Of Medicine; Estados UnidosFil: Hill, Cristal Monique. Southern Illinois University; Estados UnidosFil: Turyn, Daniel. Consejo Nacional de Investigaciones Científicas y Técnicas. Oficina de Coordinación Administrativa Houssay. Instituto de Química y Físico-Química Biológicas "Prof. Alejandro C. Paladini". Universidad de Buenos Aires. Facultad de Farmacia y Bioquímica. Instituto de Química y Físico-Química Biológicas; ArgentinaFil: Calandra, Ricardo Saul. Consejo Nacional de Investigaciones Científicas y Técnicas. Instituto de Biología y Medicina Experimental. Fundación de Instituto de Biología y Medicina Experimental. Instituto de Biología y Medicina Experimental; ArgentinaFil: Bartke, Andrzej. Southern Illinois University; Estados UnidosFil: Frungieri, Monica Beatriz. Consejo Nacional de Investigaciones Científicas y Técnicas. Instituto de Biología y Medicina Experimental. Fundación de Instituto de Biología y Medicina Experimental. Instituto de Biología y Medicina Experimental; Argentina. Universidad de Buenos Aires. Facultad de Medicina. Departamento de Bioquímica Humana; Argentin

    Out-of-order commit processors

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    Modern out-of-order processors tolerate long latency memory operations by supporting a large number of in-flight instructions. This is particularly useful in numerical applications where branch speculation is normally not a problem and where the cache hierarchy is not capable of delivering the data soon enough. In order to support more in-flight instructions, several resources have to be up-sized, such as the reorder buffer (ROB), the general purpose instructions queues, the load/store queue and the number of physical registers in the processor. However, scaling-up the number of entries in these resources is impractical because of area, cycle time, and power consumption constraints. We propose to increase the capacity of future processors by augmenting the number of in-flight instructions. Instead of simply up-sizing resources, we push for new and novel microarchitectural structures that achieve the same performance benefits but with a much lower need for resources. Our main contribution is a new checkpointing mechanism that is capable of keeping thousands of in-flight instructions at a practically constant cost. We also propose a queuing mechanism that takes advantage of the differences in waiting time of the instructions in the flow. Using these two mechanisms our processor has a performance degradation of only 10% for SPEC2000fp over a conventional processor requiring more than an order of magnitude additional entries in the ROB and instruction queues, and about a 200% improvement over a current processor with a similar number of entries.Peer ReviewedPostprint (published version

    Hardware scheduling algorithms for asymmetric single-ISA CMPs

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    As thread level parallelism in applications has continued to expand, so has research in chip multi-core processors. Since more and more applications become multi-threaded we expect to find a growing number of threads executing on a machine. Consequently, the operating system will require increasingly larger amounts of CPU time to schedule these threads efficiently. Instead of perpetuating the trend of performing more complex thread scheduling in the operating system, we propose a two lightweight hardware thread scheduling mechanisms. First is a Hardware Round-Robin Scheduling (HRRS) policy which is influenced by Fairness Scheduling techniques thereby reducing thread serialization and improving parallel thread performance. Second is a Thread Lock Section-aware Scheduling (TLSS) policy which extends HRRS policy. TLSS policy is influenced by the Fairness-aware Scheduling and bottleneck identification techniques. It complements the HRRS scheduler by identifying multithreaded application bottlenecks such as thread synchronization sections. We show that HRRS outperforms Fairness scheduler by 17 percent while TLSS outperforms HRRS by 11 percent on an ACMP consisted of one large (out-of-order) core and three small (in-order) cores

    A sulfated carbohydrate epitope inhibits axon regeneration after injury

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    Chondroitin sulfate proteoglycans (CSPGs) represent a major barrier to regenerating axons in the central nervous system (CNS), but the structural diversity of their polysaccharides has hampered efforts to dissect the structure-activity relationships underlying their physiological activity. By taking advantage of our ability to chemically synthesize specific oligosaccharides, we demonstrate that a sugar epitope on CSPGs, chondroitin sulfate-E (CS-E), potently inhibits axon growth. Removal of the CS-E motif significantly attenuates the inhibitory activity of CSPGs on axon growth. Furthermore, CS-E functions as a protein recognition element to engage receptors including the transmembrane protein tyrosine phosphatase PTPσ, thereby triggering downstream pathways that inhibit axon growth. Finally, masking the CS-E motif using a CS-E-specific antibody reversed the inhibitory activity of CSPGs and stimulated axon regeneration in vivo. These results demonstrate that a specific sugar epitope within chondroitin sulfate polysaccharides can direct important physiological processes and provide new therapeutic strategies to regenerate axons after CNS injury
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